March 17, 2013: The paper "Transactionalizing Legacy Code: An Experience Report Using GCC and Memcached" was selected as the Best Application Paper.
March 4, 2013: The TRANSACT Workshop Program is now available.
November 30, 2012: Due to multiple requests, the submission deadline has been extended to December 16, 2012. The submission website is now live.
8:20 — 8:30: Welcome
8:30 — 10:10: Session 1: STMs (Chair Tony Hosking)
Boosting Timestamp-based Transactional Memory by Exploiting Hardware Cycle Counters. Wenjia Ruan, Yujie Liu and Michael Spear (Lehigh University). (slides)
Abort Free SemanticTM by Dependency Aware Scheduling of Transactional Instructions. Shlomi Dolev (Ben-Gurion University of the Negev), Panagiota Fatourou and Eleftherios Kosmas (University of Crete & FORTH-ICS).
Enabling Speculative Parallelization via Merge Semantics in STMs. Kaushik Ravichandran and Santosh Pande (Georgia Institute of Technology). (slides)
Proving Non-Opacity. Mohsen Lesani and Jens Palsberg (University of California, Los Angeles).
10:10 — 10:40: Break
10:40 — 12:00: Session 2: Applications (Chair Justin Gottschlich)
Leaplist: Lessons Learned in Designing TM-Supported Range Queries. Hillel Avni (Tel-Aviv University), Nir Shavit (MIT and Tel-Aviv University) and Adi Suissa (Ben-Gurion University of the Negev).
Transactionalizing Legacy Code: An Experience Report Using GCC and Memcached. Trilok Vyas, Yujie Liu and Michael Spear (Lehigh University). (slides) (Best Application Paper)
From Locks to Transactional Memory: Lessons Learned from Porting a Real-world Application. Alexandre Skyrme and Noemi Rodriguez. (Pontifical Catholic University of Rio de Janeiro).
12:00 — 1:20: Lunch
1:20 — 3:00: Session 3: Hardware and Scheduling (Chair Michael Spear)
Reduced Hardware Transactions: a New Approach to Hybrid Transactional Memory. Alex Matveev (Tel-Aviv University) and Nir Shavit (MIT and Tel-Aviv University).
Enhanced Concurrency Control with Transactional NACKs. Woongki Baek, Richard Yoo and Christos Kozyrakis. (Stanford University). (slides)
EMBEDDED-SPEC: A Light-Weight and Transparent Hardware Implementation of Lock Elision for Embedded Multicore Systems. Giuseppe Capodanno, Dimitra Papagiannopoulou, R. Iris Bahar (Brown Univestiy), Tali Moreshet (Swarthmore College) and Maurice Herlihy (Brown University). (slides)
RELSTM: A Proactive Transactional Memory Scheduler. David Sainz and Hagit Attiya. (Technion)
3:00 — 3:30: Break
3:30 — 4:25: Session 4: Brief Announcements (Chair Tatiana Shpeisman)
Leveraging Transactional Memory for Energy-efficient Computing below Safe Operation Margins. Adrian Cristal, Osman Unsal, Gulay Yalcin, (Barcelona Computing Center, Spain), Christof Fetzer, Jons-Tobias Wamhoff, (Dresden University of Technology), Pascal Felber, Derin Harmanci and Anita Sobe (University of Neuchatel, Switzerland).
DREAM: Dresden Streaming Transactional Memory Benchmark. Jons-Tobias Wamhoff and Stefan Weigert (Technische Universitat Dresden).
ByteSTM: Virtual Machine-level Java Software Transactional Memory. Mohamed Mohamedin and Binoy Ravindran (Virginia Tech).
4:25 — 5:25, Town Hall Meeting: Language-Level Standards for TM (slides)
The past decade has seen an explosion of interest in programming languages, systems, and hardware to support transactions, speculation, and related alternatives to classical lock-based concurrency. Recently, transactional memory has crossed two new thresholds. First, IBM and Intel have announced hardware support for transactional memory in upcoming processors. Second, the C++ Standard Committee has begun investigation into transactional memory as a new language feature. These developments highlight the demand for continued high quality TM research.
This workshop, the eighth in its series, will provide a forum for the presentation of research on all aspects of transactional computing. The scope of the workshop is intentionally broad, with the goal of encouraging interaction across the languages, architecture, systems, database, and theory communities. Papers may address implementation techniques, foundational results, applications and workloads, or experience with working systems. Environments of interest include the full range from multithreaded or multicore processors to high-end parallel computing. This year's workshop will place a special emphasis on transactional applications by featuring an application track with the award and possibly a prize given for the best application paper.
The workshop seeks papers on topics related to all areas of software and hardware for transactional computing. Specific topics of interest include but are not limited to:
- Run-time systems
- Hardware support
- Memory models
- Language mechanisms and semantics
- Formal verification
- Speculative concurrency
- Conflict detection and contention management
- Debugging and tools
- Static analysis and compiler optimizations
- Checkpointing and failure atomicity
- Persistence and I/O
- Nesting and exceptions
- Applications, workloads, and test suites
- Experience reports
Papers should present original research. As transactional memory spans many disciplines, papers should provide sufficient background material to make them accessible to the broader community. Papers focused on foundations should indicate how the work can be used to advance practice; papers on experiences and applications should indicate how the experiments reinforce or reflect principles.
Please use this link to access the submission website.
Papers must be submitted in PDF, and be no more than 8 pages in standard two-column SIGPLAN conference format including figures and tables but not including references. Shorter submissions are welcome. The submissions will be judged based on the merit of the ideas rather than the length. Submissions must be made through the on-line submission site. Final papers will be available to participants electronically at the meeting, but to facilitate resubmission to more formal venues, no archival proceedings will be published, and papers will not be sent to the ACM Digital Library.
Papers must identify whether they are intended for the General Track or Application Track. This should be addressed by including the text "(Application Track)" or "(General Track)" in the title of the paper.
Authors will have the option of having their final paper accessible from the workshop website. Authors must be familiar with and abide by SIGPLAN's republication policy, which forbids simultaneous submission to multiple venues and requires disclosing prior publication of closely related work.
At the discretion of the program committee and with the consent of the authors, particularly worthy papers may be recommended for a special journal issue.
Please see the ASPLOS homepage for information about registration, hotels, local attractions, etc.
- Submission Deadline: Sunday, December 9, 2012 Sunday, December 16, 2012
- Author Notification: Monday, February 4, 2013
- Final Copy Due: Sunday, March 3, 2013
- Workshop: Sunday, March 17, 2013
- Michael Spear, Lehigh University
- Tatiana Shpeisman, Intel Labs
- Justin Gottschlich, Intel Labs
- Cristiana Amza, University of Toronto
- Kunal Agrawal, Washington University
- Hagit Attiya, Technion
- Annette Bieniusa, Technical University of Kaiserslautern
- Hans Boehm, HP Labs
- Adrian Cristal, BSC & Microsoft Research Centre
- Rachid Guerraoui, EPFL
- Tony Hosking, Purdue University
- Victor Luchangco, Oracle Labs
- Maged Michael, IBM Research
- Martin Pohlack, AMD
- Michael Spear, Lehigh University
- Babak Falsafi, CMU & EPFL
- Pascal Felber, Univ. of Neuchatel
- Dan Grossman, Univ. of Washington
- Rachid Guerraoui, EPFL
- Tim Harris, Oracle Labs
- Maurice Herlihy, Brown Univ.
- Tony Hosking, Purdue Univ.
- Suresh Jagannathan, Purdue Univ.
- Doug Lea, SUNY, Oswego
- Maged Michael, IBM T.J. Watson Research Center
- Eliot Moss, UMass
- Jan Vitek, Purdue Univ.
- Michael Scott, Univ. of Rochester
- Michael Spear, Lehigh Univ.
- Michael Swift, Univ. of Wisconsin
- Craig Zilles, UIUC
Please contact the program chair